The present invention relates to an apparatus for controlling video rate using a fuzzy rule-based control scheme for MPEG video encoder.
Video rate management has been a challenging technical task in the field of video communication to ensure that the utilization of the transmission media is maximized and that the service delivers the required level of video quality regardless of the input video rate variation. The necessity for video rate control arises particularly in the constant bit rate (CBR) applications which transmit a wide range of rapid motion video via fixed rate channels. MPEG phases 1 and 2 have been established for the CBR transmission of variety of video such as movies, sports, as well as for variable bit rate (VBR) communication.
For VBR MPEG video transmission, modeling of the compressed video appears as the core task to be tackled since its statistical properties provide a sound base for a strategy to achieve an optimum effective bandwidth allocation. Much research work has been performed for establishing an optimum models of compressed video.
For CBR MPEG transmission, buffering, which stores the compressed video in a first-in-first-out buffer for a specified period of time, is widely used to adapt the variable-bit-rate video to a fixed rate channel. In the buffering, the quantiser is the core function to control the video rate. However, the MPEG standards do not specify the details of the rate control process since they depend entirely on a specific design. On the other hand, MPEG 2 Test Model specifies the detail and is developed as a performance benchmark.
FIG. 1 is a block diagram showing a general video rate controller of the MPEG. In FIG. 1, encoder 2 encodes a quantised video using a variable length coding method. Buffer 3 stores the compressed and quantized video signal to smooths bursty data rate variation of compressed video. The occupancy represents the portion of the buffer capacity which is filled with the compressed video data awaiting transmission. The occupancy value(O) is input to a buffer/quantizer regulator 4. The buffer/quantizer regulator 4 determines a quantization step size(Qs) depending on the buffer occupancy. The larger value of the buffer occupancy, the larger value of the quantisation step size is determined. The occupancy value of the specific time point informs a quantizer 1 of which step size should be taken for the next encoding operation. The quantizer 1 quantises the Discrete Cosine Transform (DCT) output according to the quantisation step size(Qs).
In TM5 the rate control algorithm is based on one-step ahead estimation using a picture complexity measure. This scheme allocates a certain number of bits to each picture with equations for calculating the target number of bits. It consists of three steps: firstly estimating the target number of coded bits and a mean quantisation scale for the previous picture; secondly calculating the quantisation step size for a whole picture, (base on the current buffer occupancy); and finally, local adaptation of the framewise quantisation step size is performed for a single macro block using a normalized activity in the macro block. In the bit allocation process, bits are allocated to each type of picture (I, P and B picture) in compliance with the approximate ratio of I:P:B=8:3:2, if the input video dose not contain rapid moving pictures, i.e. if the scene change features of adjacent pictures are similar. The buffer occupancy is calculated by subtracting the actual number of coded bits from the estimated target bits. Hence, the rate control process of TM5 is considered to directly exploit similarities in the video. However, if the video contains large picture-to-picture variation, the number of target bits will differ significantly from the actual coded bits. Likewise, the activity change in the macroblock often has a large variation if a picture has a large amount of details inside it. This may cause large fluctuations in the occupancy and in the quantisation value. Therefore, if a rapid scene change occurs in the incoming video, extremely high occupancy or overflow may happen. The case of buffering malfunction is overflow when a dramatic increase in the video rate cannot be accommodated in the finite length buffer.